High Performance and Low Power Network-on-Chip Architectures and Design Methodologies

Theme

Chip Technology

Topic

High Performance and Low Power Network-on-Chip Architectures and Design Methodologies

Background

System-on-chip (SoC) architectures are getting communication-bound from both overlong physical wiring and more distributed on-chip components. Traditional bus protocols failed to solve this issue due to their poor scalability.  

Network-on-chips (NoCs) have been widely used in nowadays SoCs as they offering high scalability with hundreds/thousands of connected cores, tunable power/frequency/area with packetization, and easier design closure with fewer and shorter wires.

As SoC architectures get more complicated and physical design is more challenging for advanced processing nodes, the success of SoCs highly depends on the performance and the power consumption of on-chip interconnections like NoCs. Therefore it becomes more important to explore NoC architecture choices at early SoC design stage in terms of topologies, routing, arbitration etc. for given performance, power and area requirements. 

Meanwhile, as NoC designs are extremely complex, design automation such as interaction with other design tools, RTL generation and floorplan tuning would dramatically reduce the design effort and design cycle.     

In addition, the NoC community sees the trend of adopting machine learning technologies to improve NoC performance such as routing, as well as designing dedicated NoCs for neural network accelerators.

Target

  • A performance analysis framework for NoC design exploration
  • Advanced routing algorithms and implementations such as using machine learning technologies   
  • Physical design aware NoC design automation

Related Research Topics

  • NoC performance analysis, power analysis and Quality of Service
  • Fast and accurate modeling, simulation, and synthesis of NoC
  • Design tools (EDA) for NoCs
  • Machine learning for NoC and NoC-based Systems
  • Low power NoC architectures
  • Interconnection Networks for Deep Neural Networks
  • Timing, synchronous/asynchronous communication in network

 

Suggested Collaboration Method

AIR (Alibaba Innovative Research), one-year collaboration project. 

 

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