Alibaba Innovative Research (AIR) > Research on Frontier Technologies in Data Center and Server
【CCF-AIR青年基金】Design and Implementation of Multi-Core Heterogeneous Edge Computing Systems

Research Themes

Research on Frontier Technologies in Data Center and Server

Background

Since the 2010s, the rapid development of information technology, especially the mobile Internet and the Internet of Things, has led to a continuous growth in the total amount of computing devices and data worldwide. The increased data volume has far exceeded the total accumulated amount in the past few decades. To meet the requirements of this scenario, two modes have been formed on the cloud and the end, namely cloud computing and edge computing. In general, based on big data centres, cloud computing can flexibly provide computing requirements from small to large scales and handle the computing requirements of various endpoint devices in a centralised manner, greatly expanding the flexibility of the business. However, cloud computing has its inherent weaknesses in terms of low latency, bandwidth energy consumption, and security and privacy. As such, edge computing has developed rapidly. Edge computing is a computing model for network edge devices, and its computing data includes the downlink data of cloud services and the uplink data of devices. Edge computing and cloud computing complement each other to support the current massive data processing. Nevertheless, the current edge computing still has the following problems:

 

1. Insufficient edge computing chip performance. With the constant development of edge computing, an increasing number of computing applications require edge computing processing.   For example, a conference terminal , which simultaneously supports 6 cameras + 32 audio as an example, these audio and video data go through considerable algorithm processing such as splicing, identification, detection, sound source localization, intelligent noise reduction, etc., which require a chip with huge computing power. Unfortunately, there is no existing edge computing chip that can perfectly satisfy this scenario.

 

2.Huge cost of edge chips with high computing power. Taking Nvidia's NX as an example, the single chip provides 21T HashRate at a cost of around US$400. The high price limits its wide range of applications.

 

3. Difficult integration of multiple types of algorithms. The hardware on which current algorithms run are generally CPU, GPU, NPU, DSP, FPGA, etc. Various kinds of hardware have their own emphasis, each adapted to different types of algorithms, and complex applications usually require each algorithm to run concurrently to produce results. As such, it is necessary to integrate various algorithm hardware. However, it is difficult to implement the above-mentioned algorithm hardware in a single edge computing chip.

Due to the Moore effect and the gradual development of the manufacturing process, it is difficult to obtain a single-chip edge computing chip with excellent performance, low price, and good adaptability to various types of algorithms at the same time. Is there a solution that can relatively achieve the above advantages at this stage? This project aims to study the design and implementation of multi-core heterogeneous edge computing systems and, by leveraging existing technical outcomes, design and implement multi-core heterogeneous edge computing architecture to allow the breaking through of the Moore effect from a different perspective, thus enhancing the computing capability on the edge.

 

Based on the above problems, we hope to design a multi-core heterogeneous edge computing system as follows

 

1.It uses existing PCIE/RAPIDIO/ETH high-speed interconnection technology to connect the single chips through interconnection at low cost to form a HashRate pool, which not only fully considers cost and energy consumption, provides a unified design model, but is also compatible with common operating systems.

2.It can provide a unified entry of HashRate and normalised HashRate. The multi-core heterogeneous system is invisible to users. For users, a multi-core heterogeneous system is equivalent to a unified computing power pool, and what visible is the total HashRate of a single type of processor (such as CPU total HashRate, DSP total HashRate, FPGA total HashRate).

3. It can also design a HashRate distribution model, provide a multi-core heterogeneous HashRate scheduling system, and implement distributed algorithm processing. Meanwhile, it can also use HashRate conveniently, flexibly, and efficiently according to the characteristics of various heterogeneous processors, and provide sufficiently adequate scalability, such as real-time addition and deletion of HashRate, and access to cloud HashRate.

 

With the realisation of this multi-core heterogeneous edge computing system, we would be able to conveniently perform edge computing in a normalised manner and achieve the expansion  of computing power of edge computing in a low-cost way. It will surpass similar products in terms of price and performance, and meanwhile allow sufficient room for imagination to realise the business. The team is currently engaged in audio and video business intelligent hardware, which fits perfectly with the project. Once the research is successful, it can greatly improve the competitiveness and superiority of the team's products and overwhelm competitors’ products on a higher dimension.

Target

  • Design block diagram of heterogeneous edge computing, including block diagrams and reference designs for interconnecting each heterogeneous processor
  • Interface design of the normalised HashRate and source code implementation
  • Communication design and source code implementation of various types of heterogeneous processor 
  • The design model, document and source code implementation of the HashRate dispatching system
  • Publication of 1-2 papers in CCF-A category or top conferences and journals in the field recognised by Alibaba

Related Research Topics

  • Edge Computing

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